Open Research Questions

Status: OPEN RESEARCH BACKLOG · Evidence class: OPEN / HYPOTHESIS · Last reviewed: 2026-08-11

These questions are deliberately scoped as open. A future result should state the experiment, model, source revision, and public-safety boundary instead of silently upgrading a hypothesis.

Kernel and timing

• How do scheduler, callback, wait, timeout, and VBLANK semantics interact under interrupt masking?
• Which signed-negative and cancellation behaviors are stable across models and firmware?

Memory and transport

• What are the exact DMA boundary, overlap, cache, and failure-atomicity contracts?
• Which complete-span validation rules match the PSP-visible contract without partial side effects?

Media and graphics

• How should streamed ATRAC logical positions map onto a circular physical buffer at wrap boundaries?
• Which GE/VRAM/framebuffer synchronization points are externally observable?

Translation and coverage

• How can function ownership, continuation entries, relocations, and dynamic modules be audited without over-classifying ambiguous targets?
• Which VFPU wide, matrix, prefix, transcendental, and denormal cases need new differential fixtures?

Public deliverables

Good next artifacts include a synthetic DMA article, a VFPU behavior page, a PSPLink WSL2 runbook, a public executable/import fixture, and a second source-owned PSP application. Restricted game inputs are not prerequisites for public learning.

Wave 4 planned experiment registry

The result-free protocol index is EXP-PLANNED-REGISTRY-001 — Planned Experiments: Open, Discriminating, and Safe. It lists the next discriminating probes without assigning outcomes.

Completed measurements are indexed separately in the Experiments Registry; contradictions remain in the Contradictions Registry.